Junior Digital Circuit Designer in Dresden Junior Digital Circuit Designer

Please apply here on "MINTbund.de" using the "Apply" link/button at the top right.

Note: Please apply exclusively via our direct application link hosted by Empfehlungsbund and MINTbund.de: . We look forward to getting to know you!

About GF

GlobalFoundries® Inc. (GF®) is one of the world's leading semiconductor manufacturers. GF redefines innovation and semiconductor manufacturing by developing and delivering feature-rich process technology solutions with leading performance in all growth markets. GF offers a unique mix of design, development and manufacturing services. With a talented and diverse team and manufacturing locations in the U.S., Europe and Asia, GF is a trusted technology provider to its global customers. GF employs approximately 13,000 people, including more than 3,000 in Dresden, Germany.

For more information, visit hier .

Your Job

• Design and implement digital logic blocks (RTL) using Verilog/SystemVerilog.

• Integrate digital IP blocks into larger SoC designs.

• Develop and maintain testbenches; run simulations and support functional debugging.

• Analyze design behavior and resolve RTL issues.

• Support synthesis, timing analysis, and implementation tasks.

• Participate in design reviews and document action items.

• Gain exposure to DFT concepts such as scan chains and basic test features.

• Collaborate closely with senior designers, verification engineers, and system architect.

Required Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, Computer Engineering, or a related field.

• Basic understanding of digital logic design (combinational and sequential circuits).

• Familiarity with HDL languages (Verilog/SystemVerilog or VHDL).

• Basic experience with simulation tools.

• Understanding fundamental CMOS and semiconductor concepts.

• Analytical thinking and attention to detail.

• Fluency in English Language is required – written & verbal (at least C1).

Preferred Qualifications

• First academic or internship experience with ASIC, SoC, or FPGA projects.

• Familiarity with Linux‑based development environments.

• Basic scripting knowledge (TCL, Python, Perl, or shell).

• Exposure to EDA tools (Synopsys, Cadence, Siemens EDA) through coursework or training.

• Interest in verification, low‑power design, or SoC architectures.

We Offer

The position is open-ended and to be filled as soon as possible.

Attractive compensation components:

13th month salary, bonus payments, assistance with relocation to Dresden.

Flexible working time arrangements:

Family friendly part-time models, trust flextime, salary conversion into free time

Diverse opportunities for further development:

Career stages for every job, internal qualification offers, promotion of external educational qualifications

Focus on your health:

On-site gym and beach volleyball court, bike leasing, subsidized employee restaurant

Corporate culture:

Cooperation at eye level - everyone is on first name terms with us, budget for individual team events, social commitment via GlobalGives

You can find more benefits in detail at hier

Diversity is part of our corporate DNA. For this reason, we would like to encourage women in particular to apply for a job with us. As we value equal opportunities and inclusion is particularly important to us, we welcome applications from people with disabilities.

This vacancy is for a position up to pay grade ENG/IC1 GlobalFoundries ETV.

Information about our benefits you can find here: hier